Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
816
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.8.9  USART Interrupt Disable Register (SPI_MODE)
Name:
US_IDR (SPI_MODE)
Addresses:
0xF801C00C (0), 0xF802000C (1), 0xF802400C (2), 0xF802800C (3)
Access:
Write-only
.
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
• RXRDY: RXRDY Interrupt Disable
• TXRDY: TXRDY Interrupt Disable
• OVRE: Overrun Error Interrupt Disable
• TXEMPTY: TXEMPTY Interrupt Disable
• UNRE: SPI Underrun Error Interrupt Disable
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
UNRE
TXEMPTY
7
6
5
4
3
2
1
0
OVRE
TXRDY
RXRDY