Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
835
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.8.25 USART Manchester Configuration Register
Name:
US_MAN
Addresses:
0xF801C050 (0), 0xF8020050 (1), 0xF8024050 (2), 0xF8028050 (3)
Access:
Read-write
This register can only be written if the WPEN bit is cleared in
• TX_PL: Transmitter Preamble Length
0: The Transmitter Preamble pattern generation is disabled
1–15: The Preamble Length is TX_PL x Bit Period
• TX_PP: Transmitter Preamble Pattern
The following values assume that TX_MPOL field is not set:
• TX_MPOL: Transmitter Manchester Polarity
0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition.
1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition.
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled
1–15: The detected preamble length is RX_PL x Bit Period
• RX_PP: Receiver Preamble Pattern detected
The following values assume that RX_MPOL field is not set:
31
30
29
28
27
26
25
24
–
DRIFT
ONE
RX_MPOL
–
–
RX_PP
23
22
21
20
19
18
17
16
–
–
–
–
RX_PL
15
14
13
12
11
10
9
8
–
–
–
TX_MPOL
–
–
TX_PP
7
6
5
4
3
2
1
0
–
–
–
–
TX_PL
Value
Name
Description
00
ALL_ONE
The preamble is composed of ‘1’s
01
ALL_ZERO
The preamble is composed of ‘0’s
10
ZERO_ONE
The preamble is composed of ‘01’s
11
ONE_ZERO
The preamble is composed of ‘10’s
Value
Name
Description
00
ALL_ONE
The preamble is composed of ‘1’s
01
ALL_ZERO
The preamble is composed of ‘0’s
10
ZERO_ONE
The preamble is composed of ‘01’s
11
ONE_ZERO
The preamble is composed of ‘10’s