Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
917
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
43.7.1.2 Transmitter Clock Management
The transmitter clock is generated from the receiver clock or the divider clock or an external clock scanned on the TK I/O
pad. The transmitter clock is selected by the CKS field in SSC_TCMR (Transmit Clock Mode Register). Transmit Clock
can be inverted independently by the CKI bits in SSC_TCMR.
pad. The transmitter clock is selected by the CKS field in SSC_TCMR (Transmit Clock Mode Register). Transmit Clock
can be inverted independently by the CKI bits in SSC_TCMR.
The transmitter can also drive the TK I/O pad continuously or be limited to the actual data transfer. The clock output is
configured by the SSC_TCMR register. The Transmit Clock Inversion (CKI) bits have no effect on the clock outputs.
Programming the TCMR register to select TK pin (CKS field) and at the same time Continuous Transmit Clock (CKO
field) might lead to unpredictable results.
configured by the SSC_TCMR register. The Transmit Clock Inversion (CKI) bits have no effect on the clock outputs.
Programming the TCMR register to select TK pin (CKS field) and at the same time Continuous Transmit Clock (CKO
field) might lead to unpredictable results.
Figure 43-6. Transmitter Clock Management
TK (pin)
Receiver
Clock
Divider
Clock
MUX
Tri_state
Controller
Clock
Output
Output
CKO
Data Transfer
CKS
INV
MUX
Tri_state
Controller
Transmitter
Clock
Clock
CKI
CKG