Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

972

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

LCDC_LCDCFG1

0xF8038004

Read-write

0x00000000

Width of the LCD_HSYNC pulse, given in pixel clock cycles. Width is (HSPW+1) LCD_PCLK cycles.

Width of the LCD_VSYNC pulse, given in number of lines. Width is (VSPW+1) lines.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

VSPW

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

HSPW