Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
985
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
44.7.14 LCD Controller Interrupt Status Register
Name:
LCDC_LCDISR
Address:
0xF8038038
Access:
Read-only
Reset:
0x00000000
• SOF: Start of Frame Interrupt Status Register
When set to one this flag indicates that a start of frame event has been detected. This flag is reset after a read operation.
• DIS: LCD Disable Interrupt Status Register
When set to one this flag indicates that the horizontal and vertical timing generator has been successfully disabled. This flag is
reset after a read operation.
reset after a read operation.
• DISP: Power-up/Power-down Sequence Terminated Interrupt Status Register
When set to one this flag indicates whether the power-up sequence or power-down sequence has terminated. This flag is reset
after a read operation.
after a read operation.
• FIFOERR: Output FIFO Error
When set to one this flag indicates that an underflow occurs in the output FIFO. This flag is reset after a read operation.
• BASE: Base Layer Raw Interrupt Status Register
When set to one this flag indicates that a Base layer interrupt is pending. This flag is reset as soon as the BASEISR register is
read.
read.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
BASE
7
6
5
4
3
2
1
0
–
–
–
FIFOERR
–
DISP
DIS
SOF