Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Atmel

Product codes

AT91SAM9N12-EK

990

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

44.7.19 Base Layer Interrupt Disable Register

Name:

LCDC_BASEIDR

Address:

0xF8038050

Access:

Write-only

Reset:

0x00000000

• DMA: End of DMA Transfer Interrupt Disable Register

0: No effect.

1: Interrupt source is disabled.

• DSCR: Descriptor Loaded Interrupt Disable Register

0: No effect.

1: Interrupt source is disabled.

• ADD: Head Descriptor Loaded Interrupt Disable Register

0: No effect.

1: Interrupt source is disabled.

• DONE: End of List Interrupt Disable Register

0: No effect.

1: Interrupt source is disabled.

• OVR: Overflow Interrupt Disable Register

0: No effect.

1: Interrupt source is disabled.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

OVR

DONE

ADD

DSCR

DMA

–

–