Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
992
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
44.7.21 Base Layer Interrupt Status Register
Name:
LCDC_BASEISR
Address:
0xF8038058
Access:
Read-only
Reset:
0x00000000
• DMA: End of DMA Transfer
When set to one this flag indicates that an End of Transfer has been detected. This flag is reset after a read operation.
• DSCR: DMA Descriptor Loaded
When set to one this flag indicates that a descriptor has been loaded successfully. This flag is reset after a read operation.
• ADD: Head Descriptor Loaded
When set to one this flag indicates that the descriptor pointed to by the head register has been loaded successfully. This flag is
reset after a read operation.
reset after a read operation.
• DONE: End of List Detected
When set to one this flag indicates that an End of List condition has occurred. This flag is reset after a read operation.
• OVR: Overflow Detected
When set to one this flag indicates that an overflow occurred. This flag is reset after a read operation.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
OVR
DONE
ADD
DSCR
DMA
–
–