Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet

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SAM9X25 [DATASHEET]

11054E–ATARM–10-Mar-2014

When a character reception is completed, it is transferred to the Receive Holding Register (US_RHR) and the RXRDY bit 
in the Status Register (US_CSR) rises. If a character is completed while RXRDY is set, the OVRE (Overrun Error) bit is 
set. The last character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing 
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1. 

To ensure correct behavior of the receiver in SPI Slave Mode, the master device sending the frame must ensure a 
minimum delay of 1 Tbit between each character transmission. The receiver does not require a falling edge of the slave 
select line (NSS) to initiate a character reception but only a low level. However, this low level must be present on the 
slave select line (NSS) at least 1 Tbit before the first serial clock cycle corresponding to the MSB bit.

Because the receiver baudrate clock is active only during data transfers in SPI Mode, a receiver timeout is impossible in 
this mode, whatever the Time-out value is (field TO) in the Time-out Register (US_RTOR).

The LIN Mode provides Master node and Slave node connectivity on a LIN bus.

The LIN (Local Interconnect Network) is a serial communication protocol which efficiently supports the control of 
mechatronic nodes in distributed automotive applications.

The main properties of the LIN bus are:



Single Master/Multiple Slaves concept



Low cost silicon implementation based on common UART/SCI interface hardware, an equivalent in software, or as 
a pure state machine



Self synchronization without quartz or ceramic resonator in the slave nodes



Deterministic signal transmission



Low cost single-wire implementation



Speed up to 20 kbit/s

LIN provides cost efficient bus communication where the bandwidth and versatility of CAN are not required.

The LIN Mode enables processing LIN frames with a minimum of action from the microprocessor.

The USART can act either as a LIN Master node or as a LIN Slave node.

The node configuration is chosen by setting the USART_MODE field in the USART Mode register (US_MR):



LIN Master Node (USART_MODE=0xA)



LIN Slave Node (USART_MODE=0xB)

In order to avoid unpredicted behavior, any change of the LIN node configuration must be followed by a software reset of 
the transmitter and of the receiver (except the initial node configuration after a hardware reset). (See 

)

The baud rate is configured in the Baud Rate Generator register (US_BRGR).