Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet
Product codes
AT91SAM9X25-EK
824
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
39.7.8.6 Header Transmission (Master Node Configuration)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch Break Field, Synch Field
and Identifier Field.
and Identifier Field.
So in Master node configuration, the frame handling starts with the sending of the header.
The header is transmitted as soon as the identifier is written in the LIN Identifier register (US_LINIR). At this moment the
flag TXRDY falls.
flag TXRDY falls.
The Break Field, the Synch Field and the Identifier Field are sent automatically one after the other.
The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the character 0x55 and the Identifier
corresponds to the character written in the LIN Identifier Register (US_LINIR). The Identifier parity bits can be
automatically computed and sent (see
corresponds to the character written in the LIN Identifier Register (US_LINIR). The Identifier parity bits can be
automatically computed and sent (see
The flag TXRDY rises when the identifier character is transferred into the Shift Register of the transmitter.
As soon as the Synch Break Field is transmitted, the flag LINBK in the Channel Status register (US_CSR) is set to 1.
Likewise, as soon as the Identifier Field is sent, the flag LINID in the Channel Status register (US_CSR) is set to 1. These
flags are reset by writing the bit RSTSTA to 1 in the Control register (US_CR).
Likewise, as soon as the Identifier Field is sent, the flag LINID in the Channel Status register (US_CSR) is set to 1. These
flags are reset by writing the bit RSTSTA to 1 in the Control register (US_CR).
Figure 39-39.Header Transmission
39.7.8.7 Header Reception (Slave Node Configuration)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch Break Field, Synch Field
and Identifier Field.
and Identifier Field.
In Slave node configuration, the frame handling starts with the reception of the header.
The USART uses a break detection threshold of 11 nominal bit times at the actual baud rate. At any time, if 11
consecutive recessive bits are detected on the bus, the USART detects a Break Field. As long as a Break Field has not
been detected, the USART stays idle and the received data are not taken in account.
consecutive recessive bits are detected on the bus, the USART detects a Break Field. As long as a Break Field has not
been detected, the USART stays idle and the received data are not taken in account.
When a Break Field has been detected, the flag LINBK in the Channel Status register (US_CSR) is set to 1 and the
USART expects the Synch Field character to be 0x55. This field is used to update the actual baud rate in order to stay
synchronized (see
USART expects the Synch Field character to be 0x55. This field is used to update the actual baud rate in order to stay
synchronized (see
). If the received Synch character is not 0x55, an Inconsistent Synch Field error is
generated (see
After receiving the Synch Field, the USART expects to receive the Identifier Field.
When the Identifier Field has been received, the flag LINID in the Channel Status register (US_CSR) is set to 1. At this
moment the field IDCHR in the LIN Identifier register (US_LINIR) is updated with the received character. The Identifier
parity bits can be automatically computed and checked (see
moment the field IDCHR in the LIN Identifier register (US_LINIR) is updated with the received character. The Identifier
parity bits can be automatically computed and checked (see
TXD
Baud Rate
Clock
Start
Bit
Write
US_LINIR
1
0
1
0
1
0
1
0
TXRDY
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7
Break Field
13 dominant bits (at 0)
Stop
Bit
Break
Delimiter
1 recessive bit
(at 1)
Synch Byte = 0x55
US_LINIR
ID
LINID
in US_CSR
LINBK
in US_CSR
Write RSTSTA=1
in US_CR