Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 1011
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
In most cases, the AC97 Controller is embedded in chips that target audio player devices. In such cases, the AC97
Controller is exposed to heavy audio transfers. Using the polling technique increases processor overhead and may
fail to keep the required pace under an operating system. In order to avoid these polling drawbacks, the application
can perform audio streams by using PDC connected to channel A, which reduces processor overhead and
increases performance especially under an operating system.
The PDC transmit counter values must be equal to the number of PCM samples to be transmitted, each sample
goes in one slot.
43.7.3.3
AC97 Output Frame
The AC97 Controller outputs a thirteen-slot frame on the AC-Link. The first slot (tag slot or slot 0) flags the validity
of the entire frame and the validity of each slot; whether a slot carries valid data or not. Slots 1 and 2 are used if the
application performs control and status monitoring actions on AC97 Codec control/status registers. Slots [3:12] are
used according to the content of the AC97 Controller Output Channel Assignment Register (AC97C_OCA). If the
application performs many transmit requests on a channel, some of the slots associated to this channel or all of
them will carry valid data.
43.7.3.4
Receive Operation
The AC97 Controller can also receive data from AC97 Codec. Data is received in the channel’s shift register and
then transferred to the AC97 Controller Channel x Read Holding Register. To read the newly received data, the
application must perform the following steps:
• Poll RXRDY flag in AC97 Controller Channel x Status Register (AC97C_CxSR). x being one of the 2 channels.
• Read data from AC97 Controller Channel x Read Holding Register.
The application can also wait for an interrupt notice in order to read data from AC97C_CxRHR. The interrupt
remains active until RXRDY is cleared by reading AC97C_CxSR.
The RXRDY flag in AC97C_CxSR is set automatically when data is received in the Channel x shift register. Data is
then shifted to AC97C_CxRHR.
Figure  43-6.
Audio Transfer (PCM L Front, PCM R Front) on Channel x
If the previously received data has not been read by the application, the new data overwrites the data already wait-
ing in AC97C_CxRHR, therefore the OVRUN flag in AC97C_CxSR is raised. The application can either poll the
OVRUN flag in AC97C_CxSR or wait for an interrupt notice. The interrupt remains active until the OVRUN flag in
AC97C_CxSR is set.
The AC97 Controller can also be used in sound recording devices in association with an AC97 Codec. The AC97
Controller may also be exposed to heavy PCM transfers. The application can use the PDC connected to channel A
in order to reduce processor overhead and increase performance especially under an operating system.
The PDC receive counter values must be equal to the number of PCM samples to be received, each sample goes
in one slot.
Slot #
AC97FS
0
1
2
3
4
5
6
7
8
9
10
11
12
RXRDYCx
(AC97C_SR)
Read access to
AC97C_RHRx
AC97RX
(Codec output)
TAG
STATUS
ADDR
STATUS
DATA
PCM
LEFT
PCM
RIGHT
LINE 1
DAC
PCM
MIC
RSVED
RSVED
RSVED
LINE 2
ADC
HSET
ADC
IO
STATUS