Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 1079
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
45.12.8
DMA  Control  Register
Name:
 DMACON
Address:
0x0050001C
Access:
 Read-write
Reset  value:
 0x00000000
• DMAEN:  DMA  Enable
0: DMA is disabled.
1: DMA is enabled.
• DMARST:  DMA  Reset  (Write-only)
0: No effect.
1: Reset DMA module. DMA Module should be reset only when disabled and in idle state.
• DMABUSY:  DMA  Busy
0: DMA module is idle.
1: DMA module is busy (doing a transaction on the AHB bus).
• DMAUPDT:  DMA  Configuration  Update 
0: No effect
1: Update DMA Configuration
Used for simultaneous updating of DMA parameters in dual scan mode or when using 2D
addressing. The values written in the registers DMABADDR1, DMABADDR2 and DMA2DCFG, and in the field FRMSIZE of
register DMAFRMCFG, are accepted by the DMA controller and are applied at the next frame. This bit is used only if a dual
scan configuration is selected (bit SCANMOD of LCDCON2 register) or 2D addressing is enabled (bit DMA2DEN in this
register). Otherwise, the LCD controller accepts immediately the values written in the registers referred to above.
• DMA2DEN:  DMA  2D  Addressing  Enable
0: 2D addressing is disabled (values in register DMA2DCFG are “don’t care”).
1: 2D addressing is enabled.
31
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0
DMA2DEN
DMAUPDT
DMABUSY
DMARST
DMAEN