Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
1081
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
45.12.10 LCD Control Register 1
Name:
LCDCON1
Address:
0x00500800
Access:
Read-write, except LINECNT: Read-only
Reset value:
0x00002000
• BYPASS: Bypass LCDDOTCK Divider
0: The divider is not bypassed. LCDDOTCK frequency defined by the CLKVAL field.
1: The LCDDOTCK divider is bypassed. LCDDOTCK frequency is equal to the LCDC Clock frequency.
• CLKVAL: Clock Divider
9-bit divider for pixel clock (LCDDOTCK) frequency.
• LINECNT: Line Counter (Read-only)
Current Value of 11-bit line counter. Down count from LINEVAL to 0.
31
30
29
28
27
26
25
24
LINECNT
23
22
21
20
19
18
17
16
LINECNT
CLKVAL
15
14
13
12
11
10
9
8
CLKVAL
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
–
–
BYPASS
Pixel_clock
system_clock
CLKVAL
(
1
)
+
⁄
=