Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
155
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
20.1.6.1
2x8-bit DDR2
Hardware Configuration
Software Configuration
The following configuration has to be performed:
• Initialize the DDR2 Controller depending on the DDR2 device and system bus frequency.
The DDR2 initialization sequence is described in the sub-section “DDR2 Device Initialization” of the DDRSDRC
section.
section.
RAS
CAS
NWE
CKE
DDR_D7
DDR_D3
DDR_D2
DDR_D4
DDR_D0
DDR_D1
DDR_D1
DDR_D5
DDR_D6
DDR_D6
BA0
BA1
BA1
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
CK
NCK
NCK
CS
DDR_VREF
DDR_VREF
CK
NCK
NCK
CS
BA0
BA1
BA1
RAS
CAS
NWE
CKE
DDR_D15
DDR_D11
DDR_D10
DDR_D12
DDR_D8
DDR_D9
DDR_D9
DDR_D13
DDR_D14
DDR_D14
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_RAS
DDR_CAS
DDR_WE
DDR_CKE
DDR_BA1
DDR_BA0
DDR_NCLK
DDR_CLK
DDR_CS
DDR_D[0..15]
DDR_A[0..13]
DDR_DQS1
DDR_DQM1
DDR_DQS0
DDR_DQM0
1V8
1V8
C64
100nF
C64
100nF
C73
100nF
C73
100nF
C74
100nF
C74
100nF
C69
100nF
C69
100nF
C65
100nF
C65
100nF
C63
100nF
C63
100nF
C72
100nF
C72
100nF
MT47H64M8CF-3
DDR2 SDRAM
MN6
MT47H64M8CF-3
DDR2 SDRAM
MN6
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10
H2
BA0
G2
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
RDQS/DM
B3
RDQS/NU
A2
VDD
H9
VDD
L1
VDDL
E1
VREF
E2
VDDQ
C9
VSS
A3
VSS
E3
VDDQ
A9
VDD
E9
RFU1
G1
RFU2
L3
CKE
F2
CK
E8
CK
F8
CAS
G7
RAS
F7
WE
F3
CS
G8
VDDQ
C1
VDDQ
C3
VDDQ
C7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VDD
A1
VSS
J1
A11
K7
BA1
G3
A12
L2
A13
L8
VSS
K9
VSSDL
E7
VSSQ
A7
RFU3
L7
C70
100nF
C70
100nF
C59
100nF
C59
100nF
MT47H64M8CF-3
DDR2 SDRAM
MN7
MT47H64M8CF-3
DDR2 SDRAM
MN7
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10
H2
BA0
G2
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
RDQS/DM
B3
RDQS/NU
A2
VDD
H9
VDD
L1
VDDL
E1
VREF
E2
VDDQ
C9
VSS
A3
VSS
E3
VDDQ
A9
VDD
E9
RFU1
G1
RFU2
L3
CKE
F2
CK
E8
CK
F8
CAS
G7
RAS
F7
WE
F3
CS
G8
VDDQ
C1
VDDQ
C3
VDDQ
C7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VDD
A1
VSS
J1
A11
K7
BA1
G3
A12
L2
A13
L8
VSS
K9
VSSDL
E7
VSSQ
A7
RFU3
L7
C75
100nF
C75
100nF
C62
100nF
C62
100nF
C68
100nF
C68
100nF
C71
100nF
C71
100nF
C76
100nF
C76
100nF
C56
100nF
C56
100nF
C55
100nF
C55
100nF
C60
100nF
C60
100nF
C67
100nF
C67
100nF
C66
100nF
C66
100nF
C58
100nF
C58
100nF
C57
100nF
C57
100nF
C61
100nF
C61
100nF