Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 251
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
22.8
DDR  SDR  SDRAM  Controller  (DDRSDRC)  User  Interface
The User Interface is connected to the APB bus. 
Table  22-8.
Register Mapping
Offset
Register
Name
Access 
Reset 
0x00
DDRSDRC Mode Register
DDRSDRC_MR
Read-write
0x00000000
 0x04
DDRSDRC Refresh Timer Register
DDRSDRC_RTR
Read-write
0x00000000
 0x08
DDRSDRC Configuration Register
DDRSDRC_CR
Read-write
0x7024
 0x0C
DDRSDRC Timing Parameter 0 Register
DDRSDRC_TPR0
Read-write
0x20227225
 0x10
DDRSDRC Timing Parameter 1 Register
DDRSDRC_TPR1
Read-write
0x3c80808
 0x14
DDRSDRC Timing Parameter 2 Register
DDRSDRC_TPR2
Read-write
0x2062
 0x18
Reserved
 0x1C
DDRSDRC Low-power Register
DDRSDRC_LPR
Read-write
0x10000
 0x20
DDRSDRC Memory Device Register
DDRSDRC_MD
Read-write
0x10
 0x24
DDRSDRC DLL Information Register
DDRSDRC_DLL
Read-only
0x00000001
 0x2C
DDRSDRC High Speed Register
DDRSDRC_HS
Read-write
0x0
 0x40
DDRSDRC Delay I/O Register
DDRSDRC_DELAY1
Read-write
0x00000000
 0x44
DDRSDRC Delay I/O Register
DDRSDRC_DELAY2
Read-write
0x00000000
 0x48
DDRSDRC Delay I/O Register
DDRSDRC_DELAY3
Read-write
0x00000000
 0x4C
DDRSDRC Delay I/O Register
DDRSDRC_DELAY4
Read-write
0x00000000
 0x50
Reserved
 0x54-0x58
Reserved
-
-
-
0x60-0xE0
Reserved –
 0xE4
DDRSDRC Write Protect Mode Register
DDRSDRC_WPMR
Read-write
0x00000000
 0xE8
DDRSDRC Write Protect Status Register
DDRSDRC_WPSR
Read-only
0x00000000