Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 353
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
26.11.12 PMC  Master  Clock  Register
Name:
PMC_MCKR
Address:
0xFFFFFC30
Access:
Read/Write 
• CSS:  Master/Processor  Clock  Source  Selection 
• PRES:  Master/Processor  Clock  Prescaler 
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
PLLADIV2
MDIV
7
6
5
4
3
2
1
0
PRES
CSS
CSS
Clock  Source  Selection
0
0
Slow Clock is selected.
0
1
Main Clock is selected.
1
0
PLLA Output clock is selected.
1
1
UPLL Output clock is selected.
PRES
Master/Processor  Clock  Dividers 
Input  Clock
0
0
0
Selected clock
0
0
1
Selected clock divided by 2
0
1
0
Selected clock divided by 4
0
1
1
Selected clock divided by 8
1
0
0
Selected clock divided by 16
1
0
1
Selected clock divided by 32
1
1
0
Selected clock divided by 64
1
1
1
Reserved