Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
26.11.13 PMC  Programmable  Clock  Register
Name:
PMC_PCKx
Address:
0xFFFFFC40
Access:
Read/Write 
• CSS:  Master  Clock  Selection 
• PRES:  Programmable  Clock  Prescaler   
• SLCKMCK:  Slow  Clock  or  Master  Clock  Selection 
0 = Slow clock is selected
1 = Master clock is selected
To select between Slow Clock and Master Clock, the CSS field must be programmed to ‘00’.
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16
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13
12
11
10
9
8
SLCKMCK
7
6
5
4
3
2
1
0
PRES
CSS
CSS
Clock  Source  Selection
0
0
Slow Clock or Master Clock may be selected depending on 
SLCKMCK field.
0
1
Main Clock is selected.
1
0
PLLACK/PLLADIV2 is selected.
1
1
UPLLCK is selected.
PRES
Programmable  Clock
0
0
0
Selected clock
0
0
1
Selected clock divided by 2
0
1
0
Selected clock divided by 4
0
1
1
Selected clock divided by 8
1
0
0
Selected clock divided by 16
1
0
1
Selected clock divided by 32
1
1
0
Selected clock divided by 64
1
1
1
Reserved