Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 422
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
Figure  29-12.
Test Modes
29.5.6
Debug  Communication  Channel  Support
The Debug Unit handles the signals COMMRX and COMMTX that come from the Debug Communication Channel
of the ARM Processor and are driven by the In-circuit Emulator.
The Debug Communication Channel contains two registers that are accessible through the ICE Breaker on the
JTAG side and through the coprocessor 0 on the ARM Processor side. 
As a reminder, the following instructions are used to read and write the Debug Communication Channel:
MRC
p14, 0, Rd, c1, c0, 0
Returns the debug communication data read register into Rd
MCR
p14, 0, Rd, c1, c0, 0
Writes the value in Rd to the debug communication data write register.
The bits COMMRX and COMMTX, which indicate, respectively, that the read register has been written by the
debugger but not yet read by the processor, and that the write register has been written by the processor and not
yet read by the debugger, are wired on the two highest bits of the status register DBGU_SR. These bits can gener-
ate an interrupt. This feature permits handling under interrupt a debug link between a debug monitor running on the
target system and a debugger.
Receiver
Transmitter
Disabled
RXD
TXD
Receiver
Transmitter
Disabled
RXD
TXD
V
DD
Disabled
Receiver
Transmitter
Disabled
RXD
TXD
Disabled
Automatic Echo
Local Loopback
Remote Loopback
V
DD