Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
446
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
Figure 30-6.
Input Change Interrupt Timings
30.4.11
Write Protected Registers
To prevent any single software error that may corrupt the PIO behavior, the registers listed below can be write-pro-
tected by setting the WPEN bit in the PIO Write Protect Mode Register (PIO_WPMR).
tected by setting the WPEN bit in the PIO Write Protect Mode Register (PIO_WPMR).
If a write access in a write-protected register is detected, then the WPVS flag in the PIO Write Protect Status Reg-
ister (PIO_WPSR) is set and the field WPVSRC indicates in which register the write access has been attempted.
ister (PIO_WPSR) is set and the field WPVSRC indicates in which register the write access has been attempted.
The WPVS flag is automatically reset after reading the PIO Write Protect Status Register (PIO_WPSR).
List of the write-protected registers:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
MCK
Pin Level
Read PIO_ISR
APB Access
PIO_ISR
APB Access