Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 748
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
36.6.4
Transmit  Status  Register
Name:
EMAC_TSR
Address:
0xFFFBC014
Access:
Read-write
This register, when read, provides details of the status of a transmit. Once read, individual bits may be cleared by writing 1
to them. It is not possible to set a bit to 1 by writing to the register.
• UBR:  Used  Bit  Read
Set when a transmit buffer descriptor is read with its used bit set. Cleared by writing a one to this bit.
• COL:  Collision  Occurred
Set by the assertion of collision. Cleared by writing a one to this bit.
• RLE:  Retry  Limit  exceeded
Cleared by writing a one to this bit.
• TGO:  Transmit  Go
If high transmit is active.
• BEX: 
Buffers  exhausted  mid  frame
If the buffers run out during transmission of a frame, then transmission stops, FCS shall be bad and tx_er asserted. Cleared
by writing a one to this bit.
• COMP:  Transmit  Complete
Set when a frame has been transmitted. Cleared by writing a one to this bit.
• UND:  Transmit  Underrun
Set when transmit DMA was not able to read data from memory, either because the bus was not granted in time, because
a not OK 
hresp(bus error)
was returned or because a used bit was read midway through frame transmission. If this
occurs, the transmitter forces 
bad
CRC. Cleared by writing a one to this bit.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
UND
COMP
BEX
TGO
RLE
COL
UBR