Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
750
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
36.6.6
Transmit Buffer Queue Pointer Register
Name:
EMAC_TBQP
Address:
0xFFFBC01C
Access:
Read-write
This register points to the entry in the transmit buffer queue (descriptor list) currently being used. It is written with the start
location of the transmit buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original
values after either 1024 buffers or when the wrap bit of the entry is set. This register can only be written when bit 3 in the
transmit status register is low.
location of the transmit buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original
values after either 1024 buffers or when the wrap bit of the entry is set. This register can only be written when bit 3 in the
transmit status register is low.
As transmit buffer reads consist of bursts of two words, it is recommended that bit 2 is always written with zero to prevent a
burst crossing a 1K boundary, in violation of section 3.6 of the AMBA specification.
burst crossing a 1K boundary, in violation of section 3.6 of the AMBA specification.
• ADDR:
Transmit buffer queue pointer address
Written with the address of the start of the transmit queue, reads as a pointer to the first buffer of the frame being transmit-
ted or about to be transmitted.
ted or about to be transmitted.
31
30
29
28
27
26
25
24
ADDR
23
22
21
20
19
18
17
16
ADDR
15
14
13
12
11
10
9
8
ADDR
7
6
5
4
3
2
1
0
ADDR
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