Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
1112
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
46.14 POR Characteristics
A general presentation of Power-On-Reset (POR) characteristics is provided in
Figure 46-5. General Presentation of POR Behavior
When a very slow (versus
t
RES
) supply rising slope is applied on POR VDD pin, the reset time becomes negligible and the
reset signal is released when V
DD
rises higher than
V
th+
.
When a very fast (versus
t
RES
) supply rising slope is applied on POR VDD pin, the voltage threshold becomes negligible
and the reset signal is released after
t
RES
time. It is the smallest possible reset time.
46.14.1 Core Power Supply POR Characteristics
46.14.2 Backup Power Supply POR Characteristics
46.15 Power Sequence Requirements
The AT91 board design must comply with the power-up guidelines below to guarantee reliable operation of the device.
Any deviation from these sequences may prevent the device from booting.
Any deviation from these sequences may prevent the device from booting.
Dynamic
t
res
NRST
VDD
V
th+
V
th-
Vop
Static
Vnop
Table 46-28. Core Power Supply POR Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
th+
Threshold Voltage Rising
Minimum Slope of +2.0V/30ms
0.5
0.7
0.89
V
V
th-
Threshold Voltage Falling
Minimum Slope of +2.0V/30ms
0.4
0.6
0.85
V
t
RES
Reset Time
30
70
130
µ
s
I
DD
Current consumption
After t
RES
3
7
µ
A
Table 46-29. Backup Power Supply POR Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
th+
Threshold Voltage Rising
Minimum Slope of +2.0V/30ms
1.42
4.52
1.62
V
V
th-
Threshold Voltage Falling
Minimum Slope of +2.0V/30ms
1.35
1.45
1.55
V
t
RES
Reset Time
V
DDBU
is 3.3V
30
80
220
µ
s
V
DDBU
is 1.8V
40
100
330
I
DD
Current consumption
After t
RES
6
8.5
µ
A