Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

Product codes
ATSAMD20-XPRO
Page of 660
203
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
18.7
Register Summary
The register mapping depends on the Operating Mode bits in the Control register (CTRL.MODE). The register summary 
is presented for each of the three modes. 
Table 18-1.
Register Summary - Mode 0 Registers
Offset
Name
Bit Pos.
0x00
7:0
MATCHCLR
CLKREP
MODE[1:0]
ENABLE
SWRST
0x01
15:8
PRESCALER[3:0]
0x02
7:0
ADDR[5:0]
0x03
15:8
RREQ
RCONT
0x04
7:0
PEREO7
PEREO6
PEREO5
PEREO4
PEREO3
PEREO2
PEREO1
PEREO0
0x05
15:8
OVFEO
CMPEO0
0x06
7:0
OVF
SYNCRDY
CMP0
0x07
7:0
OVF
SYNCRDY
CMP0
0x08
7:0
OVF
SYNCRDY
CMP0
0x09
Reserved
0x0A
7:0
SYNCBUSY
0x0B
7:0
DBGRUN
0x0C
7:0
SIGN
VALUE[6:0]
0x0D
Reserved
0x0E
Reserved
0x0F
Reserved
0x10
7:0
COUNT[7:0]
0x11
15:8
COUNT[15:8]
0x12
23:16
COUNT[23:16]
0x13
31:24
COUNT[31:24]
0x14
Reserved
0x15
Reserved
0x16
Reserved
0x17
Reserved
0x18
 
7:0
COMP[7:0]
0x19
15:8
COMP[15:8]
0x1A
23:16
COMP[23:16]
0x1B
31:24
COMP[31:24]