Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

Product codes
ATSAMD20-XPRO
Page of 660
222
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
18.8.5.3  Mode 2
Name:
INTENSET
Offset:
0x07
Reset:
0x00
Property:
Write-Protected
z
Bit 7 – OVF: Overflow Interrupt Enable
0: The overflow interrupt is disabled.
1: The overflow interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Overflow Interrupt Enable bit and enable the Overflow interrupt. 
z
Bit 6 – SYNCRDY: Synchronization Ready Interrupt Enable
0: The synchronization ready interrupt is disabled.
1: The synchronization ready interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Synchronization Ready Interrupt bit and enable the Synchronization Ready 
interrupt. 
Reading this bit returns the state of the synchronization ready interrupt enable.
z
Bits 5:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to 
zero when this register is written. These bits will always return zero when read.
z
Bit 0 – ALARM0: Alarm0 Interrupt Enable
0: The alarm 0 interrupt is disabled.
1: The alarm 0 interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Alarm 0 Interrupt Enable bit and enable the Alarm 0 interrupt.
Bit
7
6
5
4
3
2
1
0
OVF
SYNCRDY
ALARM0
Access
R/W
R/W
R
R
R
R
R
R/W
Reset
0
0
0
0
0
0
0
0