Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
201
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
12.8.3.2 Interrupt Clear-enable Registers
Name:
NVIC_ICERx [x=0..7]
Access:
Read
/Write
Reset:
0x00
0000000
These registers disable interrupts, and show which interrupts are enabled.
• CLRENA: Interrupt Clear-enable
Write:
0: No effect.
1: Disables the interrupt.
Read:
0: Interrupt disabled.
1: Interrupt enabled.
0: No effect.
1: Disables the interrupt.
Read:
0: Interrupt disabled.
1: Interrupt enabled.
31
30
29
28
27
26
25
24
CLRENA
23
22
21
20
19
18
17
16
CLRENA
15
14
13
12
11
10
9
8
CLRENA
7
6
5
4
3
2
1
0
CLRENA