Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
202
12.8.3.3 Interrupt Set-pending Registers
Name:
NVIC_ISPRx [x=0..7]
Access:
Read
/Write
Reset:
0x00
0000000
These registers force interrupts into the pending state, and show which interrupts are pending.
• SETPEND: Interrupt Set-pending
Write:
0: No effect.
1: Changes the interrupt state to pending.
Read:
0: Interrupt is not pending.
1: Interrupt is pending.
0: No effect.
1: Changes the interrupt state to pending.
Read:
0: Interrupt is not pending.
1: Interrupt is pending.
Notes: 1. Writing a 1 to an ISPR bit corresponding to an interrupt that is pending has no effect.
2. Writing a 1 to an ISPR bit corresponding to a disabled interrupt sets the state of that interrupt to pending.
31
30
29
28
27
26
25
24
SETPEND
23
22
21
20
19
18
17
16
SETPEND
15
14
13
12
11
10
9
8
SETPEND
7
6
5
4
3
2
1
0
SETPEND