Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

339

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

SUPC_MR

0x400E1418

Read/Write

This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode Register 

(SYSC_MR). 



0 (NOT_ENABLE): The core reset signal “vddcore_nreset” is not affected when a brownout detection occurs.
1 (ENABLE): The core reset signal, vddcore_nreset is asserted when a brownout detection occurs.

Note: This bit is located in the VDDIO domain.



0 (ENABLE): The core brownout detector is enabled.
1 (DISABLE): The core brownout detector is disabled.

Note: This bit is located in the VDDIO domain.



0 (ONREG_UNUSED): Internal voltage regulator is not used (external power supply is used).
1 (ONREG_USED): Internal voltage regulator is used.

Note: This bit is located in the VDDIO domain.



0 (NO_EFFECT): No effect. Clock selection depends on XTALSEL value.
1 (BYPASS): The 32 kHz crystal oscillator is selected and put in bypass mode.

Note: This bit is located in the VDDIO domain.



31

30

29

28

27

26

25

24

KEY

23

22

21

20

19

18

17

16

–

–

–

OSCBYPASS

–

–

–

–

15

14

13

12

11

10

9

8

ONREG

BODDIS

BODRSTEN

–

–

–

–

7

6

5

4

3

2

1

0

–

–

–

–

–

–

–

–

0xA5

PASSWD

Writing any other value in this field aborts the write operation.