Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
448
Figure 26-7.
READ_MODE = 1: Data is sampled by SMC before the rising edge of NRD
26.8.2.2 Read is Controlled by NCS (READ_MODE = 0)
shows the typical read cycle of an LCD module. The read data is valid t
PACC
after the falling edge of the
NCS signal and remains valid until the rising edge of NCS. Data must be sampled when NCS is raised. In that
case, the READ_MODE must be set to 0 (read is controlled by NCS): the SMC internally samples the data on the
rising edge of Master Clock that generates the rising edge of NCS, whatever the programmed waveform of NRD
may be.
Figure 26-8.
READ_MODE = 0: Data is sampled by SMC before the rising edge of NCS
Data Sampling
t
PACC
MCK
A[23:0]
NCS
NRD
D[7:0]
Data Sampling
t
PACC
MCK
D[7:0]
A[23:0]
NCS
NRD