Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
623
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
32.7.1.2 Transmitter Clock Management
The transmitter clock is generated from the receiver clock or the divider clock or an external clock scanned on the 
TK I/O pad. The transmitter clock is selected by the CKS field in SSC_TCMR (Transmit Clock Mode Register). 
Transmit Clock can be inverted independently by the CKI bits in SSC_TCMR.
The transmitter can also drive the TK I/O pad continuously or be limited to the actual data transfer. The clock 
output is configured by the SSC_TCMR register. The Transmit Clock Inversion (CKI) bits have no effect on the 
clock outputs. Programming the TCMR register to select TK pin (CKS field) and at the same time Continuous 
Transmit Clock (CKO field) might lead to unpredictable results.
Figure 32-6.
Transmitter Clock Management
32.7.1.3 Receiver Clock Management
The receiver clock is generated from the transmitter clock or the divider clock or an external clock scanned on the 
RK I/O pad. The Receive Clock is selected by the CKS field in SSC_RCMR (Receive Clock Mode Register). 
Receive Clocks can be inverted independently by the CKI bits in SSC_RCMR. 
The receiver can also drive the RK I/O pad continuously or be limited to the actual data transfer. The clock output 
is configured by the SSC_RCMR register. The Receive Clock Inversion (CKI) bits have no effect on the clock 
outputs. Programming the RCMR register to select RK pin (CKS field) and at the same time Continuous Receive 
Clock (CKO field) can lead to unpredictable results.
TK (pin)
Receiver
Clock
Divider
Clock
MUX
Tri_state
Controller
Clock 
Output
CKO
Data Transfer
CKS
INV
MUX
Tri_state
Controller
Transmitter
Clock
CKI
CKG