Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
210
32072H–AVR32–10/2012
AT32UC3A3
Figure 15-33. Page Mode Read Protocol (Address MSB and LSB Are Defined in
The NRD and NCS signals are held low during all read transfers, whatever the programmed val-
ues of the setup and hold timings in the User Interface may be. Moreover, the NRD and NCS
timings are identical. The pulse length of the first access to the page is defined with the
PULSE.NCSRDPULSE field value. The pulse length of subsequent accesses within the page
are defined using the PULSE.NRDPULSE field value.
ues of the setup and hold timings in the User Interface may be. Moreover, the NRD and NCS
timings are identical. The pulse length of the first access to the page is defined with the
PULSE.NCSRDPULSE field value. The pulse length of subsequent accesses within the page
are defined using the PULSE.NRDPULSE field value.
In page mode, the programming of the read timings is described in
The SMC does not check the coherency of timings. It will always apply the NCSRDPULSE tim-
ings as page access timing (t
ings as page access timing (t
pa
) and the NRDPULSE for accesses to the page (t
sa
), even if the
programmed value for t
pa
is shorter than the programmed value for t
sa
.
15.6.9.2
Byte access type in page mode
The byte access type configuration remains active in page mode. For 16-bit or 32-bit page mode
devices that require byte selection signals, configure the MODE.BAT bit to zero (byte select
access type).
devices that require byte selection signals, configure the MODE.BAT bit to zero (byte select
access type).
CLK_SMC
A[MSB]
A[LSB]
NCS
NRD
D[15:0]
t
pa
NCSRDPULSE
t
sa
NRDPULSE
NRDPULSE
t
sa
Table 15-7.
Programming of Read Timings in Page Mode
Parameter
Value
Definition
READMODE
‘x’ No
impact
NCSRDSETUP
‘x’ No
impact
NCSRDPULSE
t
pa
Access time of first access to the page
NRDSETUP
‘x’
No impact
NRDPULSE
t
sa
Access time of subsequent accesses in the page
NRDCYCLE
‘x’
No impact