Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

Figure 27-13. Endpoint Activation Algorithm

As long as the endpoint is not correctly configured (CFGOK is zero), the controller does not
acknowledge the packets sent by the host to this endpoint.

The CFGOK bit is set only if the configured size and number of banks are correct compared to
their maximal allowed values for the endpoint (see 

) and to the maximal

FIFO size (i.e. the DPRAM size).

 for more details about DPRAM management.

The USB device address is set up according to the USB protocol.

• After all kinds of resets, the USB device address is 0.

• The host starts a SETUP transaction with a SET_ADDRESS(addr) request.

• The user write this address to the USB Address (UADD) field in UDCON, and write a zero to 

the Address Enable (ADDEN) bit in UDCON, so the actual address is still 0.

• The user sends a zero-length IN packet from the control endpoint.

• The user enables the recorded USB device address by writing a one to ADDEN.

Once the USB device address is configured, the controller filters the packets to only accept
those targeting the address stored in UADD.

UADD and ADDEN shall not be written all at once.

UADD and ADDEN are cleared:

• On a hardware reset.

• When the USBB is disabled (USBE written to zero).

• When a USB reset is detected.

When UADD or ADDEN is cleared, the default device address 0 is used.

Endpoint

Activation

CFGOK ==

1?

ERROR

Yes

Endpoint

Activated

Enable the endpoint.

EPENn = 1

Test if the endpoint configuration is correct.

UECFGn

EPTYPE

EPDIR

EPSIZE

EPBK

ALLOC

Configure the endpoint:
   - type
   - direction
   - size
   - number of banks
Allocate the configured DPRAM banks.

No