Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet

Product codes
ATSAM4L-EK
Page of 1204
845
42023E–SAM–07/2013
ATSAM4L8/L4/L2
31.3
Block Diagram
The main building blocks of the PEVC are:
• Channels: One channel per user, to propagate events and follow-up the user status
• Event Shapers (EVS): Instantiated for some generators, in case synchronisation and/or edge 
detection is needed prior to peripheral event propagation
• Input Glitch Filters (IGF): Present specifically for I/O inputs, to filter the incoming signal prior 
to going through EVS and Channel
To help distinguish the different signalling stages, following naming conventions are used:
• Generators generate events
• PEVC multiplexes these incoming events
• PEVC outputs triggers to users
Figure 31-2. PEVC Block Diagram
The maximum number of generators and Event Shapers supported by the PEVC is 64.
The maximum number of channels and users supported by the PEVC is 32.
EVS and IGF implementation are device-specific.
Refer to the Module Configuration section at the end of this chapter for the device-specific
configuration.
Channel 0
Channel ...
Channel i
User
0
Generator
...
Generator
0
EVS 0
PEVC
User
...
PAD_EVT  0
EVS …
Generator
...
Generator
j
User
i
RCSYS
CLK_PEVC
TRIG 0
TRIG...
TRIG i
EVT...
EVT...
EVT  j
SEV
CHMX
RDY 0
RDY...
RDY i
CLK 0
CLK...
CLK i
IGF
EVS
IGF