Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
1542
Datasheet
15.8.632 reg_data_out_sys_c_mmu_MMU_page_table_base_type
(data_out_sys_c_mmu_MMU_page_table_base)—Offset
70004h
Access Method
Default: 00000000h
15.8.633 reg_inp_sys_csi_receiver_csi1_dev_ready_type
(inp_sys_csi_receiver_csi1_dev_ready)—Offset 80100h
Set after programming operational registers to enable receiver
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Description
31:1
0h
RW
unused_MMU_invalidate_cache:
Unused
0
0h
WO
MMU_invalidate_cache:
MMU invalidate cache. When '1', the MMUs TLB is invalidated.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
data_out_sys_c_mmu_MMU_page_table_base:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
unus
ed
_M
MU_pag
e_tab
le_b
ase
M
M
U_page
_table
_base
Bit
Range
Default &
Access
Description
31:24
0h
RW
unused_MMU_page_table_base:
Unused
23:0
0h
RW
MMU_page_table_base:
Defines the physical page number of the page tables
Type:
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_csi_receiver_csi1_dev_ready:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h