Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2276
Datasheet
18.7.139 XECP_CMDM_STS1—Offset 8044h
Access Method
Default: 03FC0000h
18.7.140 XECP_CMDM_STS2—Offset 8048h
Access Method
16
0h
RO
commend ring running (CMD_RING_RUNNING): 
Indicates that the commend ring 
is running
Power Well: 
Core
15:8
0Ch
RO
Command next capability offset (CMD_NEXT_CAP_OFFSET): 
Reserved.
Power Well: 
Core
7:0
C1h
RO
Vendor defined capability ID (VID): 
Reserved.
Power Well: 
Core
Bit 
Range
Default & 
Access
Field Name (ID): Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
MBAR Type: 
PCI Configuration Register (Size: 64 bits)
MBAR Reference: 
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Rsvd0
EM
P
C
S
INT7_TRB
_C
NT
INT6_TRB
_C
NT
INT5_TRB
_C
NT
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:26
00h
RO
Rsvd0: 
Reserved.
Power Well: 
Core
25:18
FFh
RO
Event manager Producer Cycle State (EMPCS): 
Reserved.
Power Well: 
Core
17:12
00h
RO
Interrupter 7 TRB Count [5:0] (INT7_TRB_CNT): 
Reserved.
Power Well: 
Core
11:6
00h
RO
Interrupter 6 TRB Count [5:0] (INT6_TRB_CNT): 
Reserved.
Power Well: 
Core
5:0
00h
RO
Interrupter 5 TRB Count [5:0] (INT5_TRB_CNT): 
Reserved.
Power Well: 
Core