Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2350
Datasheet
18.8.4
Reserved and Master Latency Timer and Header Type
(RSVD_MLT_HT)—Offset Ch
Reserved, for padding Master Latency Timer Header Type Reserved
Access Method
Default: 00000000h
Type:
PCI Configuration Register
(Size: 32 bits)
Offset:
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSVD
MFB_0
CF
G
_
LY
T
_
0
ML
T
_
0
RSVD
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
00h
RO
Reserved (RSVD):
Reserved.
23
0b
RO
Multi Function Bit (MFB_0):
When set to 1 this indicates that this is a multifunction
device. Default to 0 since EHCI is at function 0, no other function beyond.
Power Well:
Core
22:16
0000000b
RO
Configuration Layout (CFG_LYT_0):
Hardwired to 0 to indicate a standard PCI
configuration layout.
Power Well:
Core
15:8
00h
RO
Master Latency Timer (MLT_0):
Because the USB2 controller is internally
implemented with arbitration on an internal interface, it does not need a master latency
timer. The bits will be fixed at 0
Power Well:
Core
7:0
00h
RO
Reserved (RSVD):
Reserved.