Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2357
18.8.12
Serial Bus Release Number and Frame Length Adjustment and 
Port Wake Capability (SBRN_FLA_PWC)—Offset 60h
Access Method
Default: 07FF2020h
7:0
0Ah
RO
Debug Port Capability ID (DP_CID_0): 
This register is hardwired to 0Ah which 
indicates that this is the start of a Debug Port Capability structure. Reset: Not 
applicable.
Power Well: 
Core
Bit 
Range
Default & 
Access
Field Name (ID): Description
Type: 
PCI Configuration Register
(Size: 32 bits)
Offset: 
31
28
24
20
16
12
8
4
0
0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0
RS
VD
Po
rtWK
Cap
M
ask_0
Po
rtWKImp_0
RS
VD
FL
TV_0
SB
RN_0
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:27
00000b
RO
Reserved (RSVD): 
Reserved.
26:17
3FFh
RW
Port Wake Up Capability Mask (PortWKCapMask_0): 
Bit positions 1 through 8 
correspond to a physical port implemented on this host controller. For example, bit 
position 1 corresponds to port 1, position 2 port 2, etc. Are only reset by the resume 
power well going low. It is not reset by the core power well going low or by a D3-to-D0 
state transition
Power Well: 
Resume
16
1b
RW
Port Wake Implemented (PortWKImp_0): 
A '1' in bit 0 indicates that this register is 
implemented to software. Are only reset by the resume power well going low. It is not 
reset by the core power well going low or by a D3-to-D0 state transition
Power Well: 
Resume
15:14
00b
RO
Reserved (RSVD): 
Reserved.
13:8
100000b
RW
Frame Length Timing Value (FLTV_0): 
Each decimal value change to this register 
corresponds to 16 high-speed bit times. The SOF cycle time (number of SOF counter 
clock periods to generate a SOF micro-frame length) is equal to 59488 + value in this 
field. The default value is decimal 32 (20h), which gives a SOF cycle time of 60000. 
Frame Length (# High Speed bit times) FLADJ Value (decimal) (decimal) 59488 0 (00h) 
59504 1 (01h) 59520 2 (02h) ... 59984 31 (1Fh) 60000 32 (20h) ... 60480 62 (3Eh) 
60496 63 (3Fh) Are only reset by the resume power well going low. It is not reset by the 
core power well going low or by a D3-to-D0 state transition
Power Well: 
Resume