Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2493
19.6.32
ERDP_LO—Offset 478h
Register ERDP_LO
Access Method
Default: 00000000h
19.6.33
ERDP_HI—Offset 47Ch
Register ERDP_HI
Access Method
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
E
R
S_T
A
BLE_BAR
Bit
Range
Default &
Access
Description
31:0
0h
RW
ERS_TABLE_BAR:
Reg field ERS_TABLE_BAR
Type:
Memory Mapped I/O Register
(Size: 32 bits)
ERDP_LO:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:22, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ERD_P
N
TR
EH
B
DE
S
I
Bit
Range
Default &
Access
Description
31:4
0h
RW
ERD_PNTR:
Reg field ERD_PNTR
3
0h
RW
EHB:
HC OS Owned Semaphore HC BIOS Owned Semaphore USB SMI Enable SMI on
Host System Error Enable SMI on OS Ownership Enable SMI on PCI Command Enable
SMI on BAR Enable SMI on Event Interrupt SMI on Host System Error SMI on OS
Ownership Change SMI on PCI Command SMI on BAR Compatible Port Count HC OS
Owned Semaphore HC BIOS Owned Semaphore USB SMI Enable SMI on Host System
Error Enable SMI on OS Ownership Enable SMI on PCI Command Enable SMI on BAR
Enable SMI on Event Interrupt SMI on Host System Error SMI on OS Ownership Change
SMI on PCI Command SMI on BAR Compatible Port Count
2:0
0h
RW
DESI:
Dequeue ERST Segment Index (DESI) RW. Default = 0. This field may be used by
the xHC to accelerate checking the Event Ring full condition. This field is written with the
low order 3 bits of the offset of the ERST entry which defines the Event Ring segment
that the Event Ring Dequeue Pointer resides in.