Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2559
19.6.117 DEVTEN—Offset C708h
Device Event Enable Register
Access Method
Default: 00000000h
20:17
0h
RW
TRGTULST:
16:13
0h
RO
RSVD41:
reserved
12
0h
RW
INITU2ENA:
Initiate U2 Enable
11
0h
RW
REJECTU2DIS:
10
0h
RW
INITU1ENA:
Compliance
9
0h
RW
REJECTU1DIS:
8:5
0h
RW
ULSTCHNGREQ:
Reg field ULSTCHNGREQ
4:1
0h
RW
TSTCTL:
Reg field TSTCTL
0
0h
RO
RSVD0:
reserved
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
DEVTEN:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:22, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
2
U2INACT
T
IMOUTRCVDEN
VE
ND
E
V
TS
TRCV
D
E
N
EV
NT
O
V
E
R
FL
OW
EN
CMD
C
MP
LT
EN
ER
R
T
ICE
R
RE
V
T
EN
RSV
D
39
SO
FT
E
V
T
E
N
EO
PF
EVTE
N
RSV
D
3
WKUPEVTE
N
ULST
CNG
E
N
C
O
NN
EC
TD
O
N
EE
V
T
EN
US
B
R
ST
EVTE
N
D
ISSC
ONNE
V
T
EN
Bit
Range
Default &
Access
Description
31:14
0h
RO
RSVD2:
reserved
13
0h
RW
U2INACTTIMOUTRCVDEN:
U2 Inactivity Timeout LMP Received Event Enable