Intel E3815 FH8065301567411 Data Sheet

Intel

Product codes

FH8065301567411

Intel

®

Atom™ Processor E3800 Product Family

2642

Datasheet

19.7

USB 3.0 Device Memory Mapped I/O Registers

19.7.1

APBFC_ILDOA0—Offset 8h

Access Method

Default: 0000h

Table 220.

Summary of USB 3.0 Device Memory Mapped I/O Registers—BAR

Offset

Size

Register ID—Description

Default

Value

8h

2

“APBFC_ILDOA0—Offset 8h” on page 2642

0000h

Ch

2

“APBFC_ILDOACLK0—Offset Ch” on page 2643

0000h

10h

2

“APBFC_ILDOS0—Offset 10h” on page 2644

0000h

14h

2

“APBFC_IPMA0—Offset 14h” on page 2645

0000h

18h

2

“APBFC_IPMA1—Offset 18h” on page 2647

0000h

1Ch

2

“APBFC_OPMA0—Offset 1Ch” on page 2648

0000h

20h

2

“APBFC_IPIPE0—Offset 20h” on page 2648

0000h

24h

2

“APBFC_IPIPE1A—Offset 24h” on page 2649

0000h

28h

2

“APBFC_IPIPE1B—Offset 28h” on page 2650

0000h

2Ch

2

“APBFC_IPIPE1C—Offset 2Ch” on page 2651

0000h

30h

2

“APBFC_IPIPE2—Offset 30h” on page 2651

0000h

34h

2

“APBFC_IPIPE3—Offset 34h” on page 2652

0000h

38h

2

“APBFC_OPIPE0—Offset 38h” on page 2653

0000h

3Ch

2

“APBFC_OPIPE1A—Offset 3Ch” on page 2654

0000h

40h

2

“APBFC_OPIPE1B—Offset 40h” on page 2655

0000h

44h

2

“APBFC_OPIPE1C—Offset 44h” on page 2656

0000h

48h

2

“APBFC_OPIPE2—Offset 48h” on page 2656

0000h

4Ch

2

“APBFC_OTG3_MISC0—Offset 4Ch” on page 2657

000Bh

50h

2

“APBFC_OTG3_MISC1—Offset 50h” on page 2658

0000h

54h

2

“APBFC_OTG3_MISC2—Offset 54h” on page 2658

1100h

58h

2

“APBFC_OTG3_MISC3—Offset 58h” on page 2659

7008h

5Ch

2

“APBFC_U3PMU_CFG0_REG—Offset 5Ch” on page 2660

0000h

60h

2

“APBFC_U3PMU_CFG1_REG—Offset 60h” on page 2661

0000h

Type:

Memory Mapped I/O Register

(Size: 16 bits)

APBFC_ILDOA0:

[BAR + 10F800h] + 8h

BAR Type:

PCI Configuration Register (Size: 32 bits)

BAR Reference:

[B:0, D:22, F:0] + 10h