Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
401
13.6.52
DPTF_GFXT—Offset 109h
GFX Thermals Control - This register is used to enable clock (On clocks) throttling.Write
to this Register also triggers Punit to take action to execute. In the RTL the register is
listed as MMIO_SPARE5
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R1
_WR_MA
SK
R1_RD_MASK
R0
_WR_MA
SK
R0_RD_MASK
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
0h
RW
R1_WR_MASK:
Rank 1 Write Mask: Mask writes to Rank1
23:16
0h
RW
R1_RD_MASK:
Rank 1 Read Mask: Mask reads to Rank1
15:8
0h
RW
R0_WR_MASK:
Rank 0 Write Mask: Mask writes to Rank0
7:0
0h
RW
R0_RD_MASK:
Rank 0 Read Mask: Mask reads to Rank0
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Re
se
rv
ed
_
1
TM2_THRO
T
_G
FX
Re
se
rv
ed
_
3
TM1_THRO
T
_G
FX
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
0h
RW
Reserved_1:
Resered for future use
15:8
0h
RW
TM2_THROT_GFX:
TM2 Control for GFX
7:3
0h
RW
Reserved_3:
Reserved for future use