Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
453
14.10.5
SRX—Offset 3C4h
Sequencer Index
Access Method
Default: 00h
7
4
0
0
0
0
0
0
0
0
0
AR_RE
G
IS
TER_D
E
SC
RIP
T
IONS
Bit 
Range
Default & 
Access
Field Name (ID): Description
7:0
0b
RW
AR_REGISTER_DESCRIPTIONS: 
AR indexed register descriptions
Type: 
Memory Mapped I/O Register
(Size: 8 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h
7
4
0
0
0
0
0
0
0
0
0
RE
SERV
ED
SEQ
U
E
N
CE
R_INDEX
Bit 
Range
Default & 
Access
Field Name (ID): Description
7:3
0b
RW
RESERVED: 
Read as 0s.
2:0
0b
RW
SEQUENCER_INDEX: 
This field contains a 3-bit Sequencer Index value used to access 
sequencer data re gisters at indices 0 through 7.  
Notes: 
SR02 is referred to in the VGA standard as the Map Mask Register. However, the word 
map is used with multiple meanings in the VGA standard and was, therefore, deemed 
too confusing; hence, the reason for calling it the Plane Mask Register.  
SR07 is a standard VGA register that was not documented by IBM. It is not a graphics 
controller extension.