Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
PCU – iLB – Real Time Clock (RTC)
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
4547
36.4
References
Accessing the Real Time Clock Registers and the NMI Enable Bit: 
36.5
Register Map
36.6
IO Mapped Registers
The RTC internal registers and RAM is organized as two banks of 128 bytes each, called 
the standard and extended banks. 
Note:
It is not possible to disable the extended bank.
The first 14 bytes of the standard bank contain the RTC time and date information 
along with four registers, A - D, that are used for configuration of the RTC. The 
extended bank contains a full 128 bytes of battery backed SRAM. All data movement 
between the host CPU and the RTC is done through registers mapped to the standard I/
O space.
Note:
Registers reg_RTC_IR_type and reg_RTC_TR_type are used for data movement to and 
from the standard bank. Registers reg_RTC_RIR_type and reg_RTC_RTR_type are used 
for data movement to and from the extended bank. All of these registers have alias I/O 
locations, as indicated in 
.
36.7
Indexed Registers
The RTC contains indexed registers that are accessed via the reg_RTC_IR_type and 
reg_RTC_TR_type registers.
PM1_CNT.SLP_TYP
12:10
0b
GPE0a_EN.PME_B0_EN
13
0b
GPE0a_EN.BATLOW_EN
10
0b
Table 326. Register Bits Reset by ILB_RTC_RST# Assertion  (Sheet 2 of 2)
Register Bit
Bit(s)
Default State
Table 327.
I/O Registers Alias Locations  
Register
Original I/O Location
Alias I/O Location
reg_RTC_IR_type
70h
74h
reg_RTC_TR_type
71h
75h
reg_RTC_RIR_type
72h
76h
reg_RTC_RTR_type
73h
77h