Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
PCU – iLB – 8254 Timers
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4555
If both count and status of a counter are latched, the first read operation from that
counter returns the latched status, regardless of which was latched first. The next one
or two reads, depending on whether the counter is programmed for one or two type
counts, returns the latched count. Subsequent reads return unlatched count.
counter returns the latched status, regardless of which was latched first. The next one
or two reads, depending on whether the counter is programmed for one or two type
counts, returns the latched count. Subsequent reads return unlatched count.
37.4
Register Map
37.5
IO Mapped Registers
The IO ports listed in
have multiple register functions depending on the
current programmed state of the 8254. The port numbers referenced in the register
descriptions following
descriptions following
is one possible combination but not the only one.
§
Table 332.
Register Aliases
Port
Alias
Register Name
Default Value
Access
40h
50h
Counter 0 Interval Time Status Byte Format (C0TS)
0xxxxxxxb
RO
Counter 0 Counter Access Port Register (C0AP)
Undefined
RW
41h
51h
Counter 1 Interval Time Status Byte Format (C1TS)
0xxxxxxxb
RO
Counter 1 Counter Access Port Register (C1AP)
Undefined
RW
42h
52h
Counter 2 Interval Time Status Byte Format (C2TS)
0xxxxxxxb
RO
Counter 2 Counter Access Port Register (C2AP)
Undefined
RW
43h
-
Timer Control Word Register (TCW)
Undefined
WO
Read Back Command (RBC)
xxxxxxx0b
WO
Counter Latch Command (CLC)
xxxx0000b
WO