Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
PCU – iLB – High Precision Event Timer (HPET)
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
4561
38
PCU – iLB – High Precision 
Event Timer (HPET)
This function provides a set of timers that to be used by the operating system for 
timing events. One timer block is implemented, containing one counter and three 
timers.
38.1
Features
38.1.1
Non-Periodic Mode - All Timers
This mode can be thought of as creating a one-shot. When a timer is set up for non-
periodic mode, it generates an interrupt when the value in the main counter matches 
the value in the timer's comparator register. As timers 1 and 2 are 32-bit, they will 
generate another interrupt when the main counter wraps.
T0CV cannot be programmed reliably by a single 64-bit write in a 32-bit environment 
unless only the periodic rate is being changed. If T0CV needs to be re-initialized, the 
following algorithm is performed: 
1. Set T0C.TVS
2. Set T0CV[31:0]
3. Set T0C.TVS
4. Set T0CV[63:32]
Every timer is required to support the non-periodic mode of operation.
I
O
I
O
I
O
I
O
I
O
I
O
I
O
O
Platform Control Unit
UART
LP
C
GP
IO
RTC
HP
ET
82
59
AP
IC
82
54
SMB
iLB
SPI
PMC