Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

463

GPIO Control Registers GPIO I2C register (gmbus_register.v reg_gpio0, reg_gpio1, 

reg_gpio2. reg_gpio3, reg_gpio4)

Default: 00000808h

0

0b

WO

This is a mask bit to determine whether the 

GPIO Clock DIRECTION VALUE bit should be written into the register. This value is not 

stored and when read returns 0. 

0 = Do NOT update the GPIO Clock Direction Value bit on a write (default). 

1 = Update the GPIO Clock Direction Value bit. on a write operation to this register.  

AccessType: Write Only

Memory Mapped I/O Register

(Size: 32 bits)

PCI Configuration Register (Size: 32 

bits)
GTTMMADR_LSB Reference: 

[B:0, D:2, F:0] + 10h

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0

RESE

RVED

GPIO_DA

TA_I

N

_RO

GPIO

_DA

TA_V

A

LUE

_

R_W

G

P

IO

_DA

TA_MA

SK

_W

O

G

PIO_DA

TA_DIREC

T

ION_V

A

LUE_R_W

GPIO_DA

TA_DIRECTION_MASK_W

O

RESE

RVE

D

_1

GP

IO_C

LO

CK_DA

TA_I

N

_RO

GPI

O

_C

LO

CK_DA

TA_V

A

LUE_R_W

G

PIO_CL

O

C

K

_DA

TA_MASK

_W

O

GPIO_CL

O

CK_DIRE

C

T

ION_V

ALUE_R_W

G

PIO_

C

LO

C

K

_DIRECTION_MASK_W

O

31:13

0b

RW

Reserved.

12

0b

RO

This is the value that is sampled on the GPIO_Data pin as an 

input.  

This input is synchronized to the Core Clock domain. Because the default setting is this 

buffer is an input, this bit is undefined at reset.  

AccessType: Read Only

11

1b

RW

This is the value that should be place on the GPIO Data 

pin as an output. This value is only written into the register if GPIO DATA MASK is also 

asserted. The value will appear on the pin if this data value is actually written to this 

register and the GPIO Data DIRECTION VALUE contains a value that will configure the 

pin as an output. 

Default = 1. The GPIO default clock data value is programmed to 1 in hardware. The 

hardware drives a default of 1 since the I2C interface defaults to a 1 . (this mimics the 

I2C external pull-ups on the bus)