Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
485
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
RE
SE
RVED
DPLL_A_HD
M
I_D
IV
IDER_HI_RES
RESE
RVED
_1
D
P
LL
_
A
_HDMI_DIV
IDER_VGA
RESE
RVED
_2
DP
LL_A_SD
VO_H
DMI_MU
LT
IP
LIER_H
I_RES
RESE
RVED
_3
DP
LL
_A_SDVO_HD
M
I_MUL
TIPLIER_VGA
Bit
Range
Default &
Access
Field Name (ID): Description
31:30
0b
RW
RESERVED:
Reserved.
29:24
0b
RW
DPLL_A_HDMI_DIVIDER_HI_RES:
When the source is high resolution, this field
determines the number of pixels to be included in the multiplied packet defined by the
SDVO/HDMI multiplier. For SDVO and CRT, the only valid setting is 1x.
HDMI example: If the pixel clock on the display should be 180MHz and the display PLL is
set to 270MHz, two pixels and one fill code must be sent over HDMI (fixed frequency
mode only). Therefore, the HDMI divider should be set to 2 and the SDVO/HDMI
multiplier should be set to 3, since 180 MHz (pixel clock) = 2/3*270MHz (link character
clock)
This divider must be set to 1x for any mode except HDMI fixed frequency mode.
Value in this register = number of pixels per packet 1
Default: 0000 1 pixel per packet (Default value, must be set to 1x for any mode except
HDMI fixed frequency mode)
Range: 0-63 (1 pixel per packet 64 pixels per packet)
23:22
0b
RW
RESERVED_1:
Reserved.
21:16
0b
RW
DPLL_A_HDMI_DIVIDER_VGA:
When the source is VGA, these bits specify the HDMI
divider. The format of this field is the same as that of the hi-res divider.
15:14
0b
RW
RESERVED_2:
Reserved.
13:8
0b
RW
DPLL_A_SDVO_HDMI_MULTIPLIER_HI_RES:
This field determines the data
multiplier for sDVO and is also applied to CRT. In order to keep the clock rate to a more
narrow range of rates, the multipler is set and the Display PLL programmed to a multiple
of the display mode s actual clock rate. This is unrelated to the pixel multiply that is
selectable per plane.
6x and higher multipliers can only be used for HDMI mode.
Value in this register = multiplication factor - 1
Default: 000000 (1X)
Range: 0 63 (1X 64X)
7:6
0b
RW
RESERVED_3:
Reserved.