Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
706
Datasheet
14.11.51 PIPEA_IMAGE_ENHANCEMENT_BIN_DATA_REGISTER—Offset
61264h
PIPEA_IMAGE_ENHANCEMENT_BIN_DATA_REGISTER index registers
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Field Name (ID): Description
31
0b
RW
IMAGE_ENHANCEMENT_HISTOGRAM_ENABLED:
This bit enables the Image
Enhancement histogram logic to collect data.
0 = Image histogram is disabled
1 = The Image histogram is enabled. When this bit is changed from a zero to a one,
histogram calculations will begin after the next VBLANK of the assigned pipe.
30
0b
RW
IMAGE_ENHANCEMENT_MODIFICATION_TABLE_ENABLED:
This bit enables the
Image Enhancement modification table.
0 = disabled
1 = enabled. When this bit is changed from a zero to a one, modifications begin after
the next VBLANK of the assigned pipe.
29
0b
RW
RESERVED_MBZ_IMAGE_ENHANCEMENT_PIPE_ASSIGNMENT:
Each pipe has its
own IE function
28:25
0b
RW
RESERVED:
Always write as 0 s.
24
0b
RW
HISTOGRAM_MODE_SELECT:
0: YUV Luma Mode
1: HSV Intensity Mode - Reserved on [DevCL]
23:16
0b
RW
SYNC_TO_PHASE_IN_COUNT:
This field indicates the phase in count number on
which the Image Enhancement table will be loaded if the Sync to Phase in is enabled.
15
0b
RW
RESERVED_1:
Always write as 0.
14:13
0b
RW
ENHANCEMENT_MODE:
00: Direct look up mode
01: Additive mode
10: Multiplicative mode - Reserved on [DevCL]
11: Reserved
12
0b
RW
SYNC_TO_PHASE_IN:
Setting this bit enables the double buffered registers to be
loaded on the phase in count value specified instead of the next vblank.
11
0b
RW
BIN_REGISTER_FUNCTION_SELECT:
This field indicates what data is being written
to or read from the bin data register.
0 = Bin Threshold Count. A read from the bin data register returns that bin s threshold
value from the most recent vblank load event (guardband threshold trip). Valid range
for the Bin Index is 0 to 31.
1 = Bin Image Enhancement Value. Valid range for the Bin Index is 0 to 32
10:7
0b
RW
RESERVED_2:
Always write as 0's.
6:0
0b
RW
BIN_REGISTER_INDEX_READ_ONLY:
This field indicates the bin number whose
data can be accessed through the bin data register. This value is automatically
incremented by a read or a write to the bin data register if the busy bit is not set.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h