Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
793
14.11.131 DPC_AUX_CH_DATA5—Offset 64224h
Display Port C AUX Data Register 5 [DevCTG, DevCDV] AuxC Data5 (dprrega_b0.v
auxc_dpr_data5, ql_auxc_d5)
Access Method
Default: 00000000h
14.11.132 DPC_AUX_TST—Offset 64228h
Display Port C AUX Test Register
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0b
RW
AUX_CH_DATA4_31:
0]:
The fourth DWord of the message. The MSbyte is transmitted first. Only used if the
message size is greater than 12. Reads will give the response data after transaction
complete.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AUX_CH_
D
A
TA5_31
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0b
RW
AUX_CH_DATA5_31:
0]:
The fifth DWord of the message. The MSbyte is transmitted first. Only used if the
message size is greater than 16. Reads will give the response data after transaction
complete.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h