Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
863
14.11.191 FW5—Offset 70074h
Display FIFO Watermark1 Control 5
Access Method
Default: 04040404h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RE
SE
RVED
DISP
LA
Y
_
SPRITE_B_FIFO_W
A
T
E
RMARK
1
RESE
RVED
_1
CU
R
S
OR_A_FIFO_W
A
T
E
RMARK
1
DISPLA
Y
_
SPRITE_A_FIFO_W
A
T
E
RMARK
1
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:24
0b
RW
RESERVED: 
: MBZ
23:16
00000100b
RW
DISPLAY_SPRITE_B_FIFO_WATERMARK1: 
[DevCDV] Number in 64Bs of space in 
FIFO above which the Display Sprite B Stream will generate request with status 2
15:14
0b
RW
RESERVED_1: 
: MBZ
13:8
000100b
RW
CURSOR_A_FIFO_WATERMARK1: 
DevCDV] Number in 64Bs of space in the Cursor A 
FIFO above which the Cursor A Stream will generate requests with status 2 to Memory 
(Value should be as recommended in the high priority bandwidth analysis spreadsheet).
7:0
00000100b
RW
DISPLAY_SPRITE_A_FIFO_WATERMARK1: 
DevCDV] Number in 64Bs of space in 
FIFO above which the Display Sprite A Stream will generate request with status 2  
(Value should be as recommended in the high priority bandwidth analysis spreadsheet). 
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h