Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

94

Datasheet

The Intel

 

Automatic Display Brightness feature dynamically adjusts the backlight 

brightness based upon the current ambient light environment. This feature requires an 
additional sensor to be on the panel front. The sensor receives the changing ambient 
light conditions and sends the interrupts to the Intel Graphics driver. As per the change 
in Lux, (current ambient light illuminance), the new backlight setting can be adjusted 
through BLC. The converse applies for a brightly lit environment. Intel Automatic 
Display Brightness increases the back light setting.

When a Local Flat Panel (LFP) supports multiple refresh rates, the Intel

®

 Display 

Refresh Rate Switching power conservation feature can be enabled. The higher refresh 
rate will be used when on plugged in power or when the end user has not selected/
enabled this feature. The graphics software will automatically switch to a lower refresh 
rate for maximum battery life when the design application is on battery power and 
when the user has selected/enabled this feature.

There are two distinct implementations of Intel SDRRS—static and seamless. The static 
Intel SDRRS method uses a mode change to assign the new refresh rate. The seamless 
Intel SDRRS method is able to accomplish the refresh rate assignment without a mode 
change and therefore does not experience some of the visual artifacts associated with 
the mode change (SetMode) method.

The main memory is power managed during normal operation and in low-power ACPI 
Cx states.

Any system memory (SM) interface signal that goes to a memory module connector in 
which it is not connected to any actual memory devices (such as DIMM connector is 
unpopulated, or is single-sided) is tri-stated. The benefits of disabling unused SM 
signals are:

•

Reduced power consumption.

•

Reduced possible overshoot/undershoot signal quality issues seen by the processor 
I/O buffer receivers caused by reflections from potentially un-terminated 
transmission lines.

When a given rank is not populated, the corresponding chip select and CKE signals are 
not driven.

At reset, all rows must be assumed to be populated, until it can be proven that they are 
not populated. This is due to the fact that when CKE is tristated with an SO-DIMM 
present, the DIMM is not guaranteed to maintain data integrity.