STMicroelectronics Discovery kit for STM32L151/152 line - with STM32L152RC MCU STM32L152C-DISCO STM32L152C-DISCO Hoja De Datos

DocID022799 Rev 6

Susceptibility tests are performed on a sample basis during device characterization.

While a simple application is executed on the device (toggling 2 LEDs through I/O ports). 
the device is stressed by two electromagnetic events until a failure occurs. The failure is 
indicated by the LEDs:


(positive and negative) is applied to all device pins until 

a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.



: A Burst of Fast Transient voltage (positive and negative) is applied to V

DD

 and 

V

SS

 through a 100 pF capacitor, until a functional disturbance occurs. This test is 

compliant with the IEC 61000-4-4 standard.

A device reset allows normal operations to be resumed. 

The test results are given in 

. They are based on the EMS levels and classes 

defined in application note AN1709.

          

EMC characterization and optimization are performed at component level with a typical 
application environment and simplified MCU software. It should be noted that good EMC 
performance is highly dependent on the user application and the software in particular.

Therefore it is recommended that the user applies EMC software optimization and 
prequalification tests in relation with the EMC level requested for his application.

Software recommendations

The software flowchart must include the management of runaway conditions such as:


Corrupted program counter



Unexpected reset



Critical data corruption (control registers...)

Prequalification trials

Most of the common failures (unexpected reset and program counter corruption) can be 
reproduced by manually forcing a low state on the NRST pin or the oscillator pins for 1 
second.

V

FESD

Voltage limits to be applied on any I/O pin to 
induce a functional disturbance

V

DD 

3.3 V, LQFP100, T

A 

+25 °C, 

f

HCLK 

32 MHz

conforms to IEC 61000-4-2

2B

V

EFTB

Fast transient voltage burst limits to be 
applied through 100 pF on V

DD

 and V

SS 

pins to induce a functional disturbance

V

DD

3.3 V, LQFP100, T

A 

+25 °C, 

f

HCLK 

32 MHz

conforms to IEC 61000-4-4

4A